events
Semiconductors and chips are the backbone of modern digital innovation, powering critical domains such as mobility, energy, health, agrifood, cybersecurity, and artificial intelligence. In a global context marked by supply chain fragility, increasing demand, and geopolitical dependency, the European Union has responded with strategic initiatives like the European Chips Act to strengthen its industrial and technological sovereignty.
This webinar aims at delving into the insights of the Report on Landscape and Gap Analysis of Standards in Semiconductor and Chip Technologies, a major deliverable of the Technical Working Group co-led by the EC-funded projects ICOS, StandICT.eu, and ALLPROS.eu.
The speakers seek to spark an informed debate among standardisation stakeholders, policymakers, industry representatives, and research communities on the findings of the newly released report, which analyses nearly 5,000 existing global standards and identifies current gaps that could hinder Europe’s competitiveness and resilience in the chip domain.
Objectives
- Present the key findings of the Landscape and Gap Analysis Report on semiconductor standards.
- Raise awareness of the critical role of standardisation in advancing Europe’s strategic autonomy in semiconductors.
- Foster dialogue among experts, policymakers, and SDOs on how to address identified standardisation gaps.
- Lay the groundwork for new collaborations and working groups that can advance targeted semiconductor standards aligned with EU priorities.
Why attend
- Understand how standardisation can help EU stay competitive in a high-stakes geopolitical landscape.
- Learn about new opportunities for contributing to future standards that support innovation, interoperability, and resilience.
- Engage with the authors and contributors of the report and provide feedback for future actions.
Agenda (CEST | UTC +2)
15:00 | Welcome and introduction, Maria Giuffrida, StandICT.eu
15:05 | Semiconductor standardisation and EU strategic priorities, Thomas Reibe, European Commission
15:10 | Methodology for mapping semiconductor standards, Ryoichi Ishihara, ICOS
15:20 | Application - Analysis and Gaps, Abhishek Ramanujan, Co-Chair, IEC TC 47/SC47A/WG9 convenor
15:30 | Technology - Analysis and Gaps, Ryoichi Ishihara & Salahuddin Nur, ICOS Semiconductors
15:40 | Harmonised Standardisation - Analysis and Gaps, Karim Tobich, ISO/IEC JTC1 SC27 and SC41 member
15:50 | Panel Discussion & Conclusions
16:00 | End of the webinar
-
Date
2025October23
- Time 15:00:00 - 16:00:00